Growing Demand for Ausdia’s Design Constraint Verification and Management Solution Leads to Expansion in Asia Pac Region

BANGALORE, India–(BUSINESS WIRE)–DVCon INDIA – Ausdia, the leading provider of design constraint verification and management solutions that complement timing signoff for complex system-on-chip (SoC) designs, has expanded its regional offices in India, adding an office in Noida, Uttar Pradesh, India. This additional location will support increasing customer demand for the company’s flagship product Timevision^TM. Pradeep CR, senior technical account manager for Ausida in India, will manage both locations in Bengaluru and Noida.

“Do to the growing demand in Asia Pac under Pradeep’s leadership, we are now able to provide customers with high quality, personable support in multiple regions, ” said Sam Appleton, CEO, Ausdia. “This expansion continues Ausdia’s commitment to our customers and the region to address the challenges of SoC designs.”

About Timevision Platform

The Timevision platform integrates a variety of formal, structural and simulation-based technologies to aid STA engineers in the quick and confident development of constraints from high-level data. This groundbreaking approach allows STA engineers to dramatically increase their productivity by operating as constraint synthesizers, rather than line-by-line writers and debuggers.

Ausdia will be showcasing the Timevision platform and the company’s latest technology advances at DVCon India, in booth #18. Included in the demonstration will be the new enhancement, Timevision SC that was recently announced at the 60^th Design Automation Conference (DAC) 2023.

Timevision SC allows constraint developers to both read and write timing constraints in a Spreadsheet format – typically Excel^TM. This empowers users to express their design intentions in a simple, reviewable format, with Timevision automation taking care of the complexities of translation to exact SDC syntax. Users can also export existing SDC to SC (Spreadsheet Constraints) format for simplified review and porting.

About Ausdia

Ausdia delivers standout timing constraint development, verification, and management solutions that complement all implementation and timing signoff flows. The company’s groundbreaking methodology and products give system-on-chip (SoC) and integrated circuit (IC) developers a new way to work, enabling massive productivity gains throughout the design flow. Founded in 2006, the privately held company is headquartered in Sunnyvale, California.

Ausdia acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

Contacts

For more information, contact:

Michelle Clancy Fuller

Cayenne Global

Michelle.clancy@cayenncom.com
+1 503.702.4732